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| NJU26103 Digital Audio Processor for TV General Description The NJU26103 is a high performance 24-bit digital audio processor for TV that has a QFP 32-pin small package. The NJU26103 provides an internal delay memory to adjust the output delay time for lip sync. Moreover, the NJU26103 adopts SRS WOW technology. Package FEATURES * Variable 2 Channels Audio Delay (16 bit data width). Maximum Delay 42msec at Fs = 48kHz ( 46msec at Fs = 44.1kHz ) * SRS WOW audio technology NJU26103 Digital Signal Processor Specification * 24bit Fixed-point Digital Signal Processing * Maximum Clock Frequency : 38MHz * Digital Audio Interface : 2 Input ports 1 Output port * Digital Audio Format : I2S 24bit, Left-Justified, Right-Justified, BCK : 32Fs / 64Fs * Master / Slave Mode * Master Mode MCK : 1/2 fclk, 1/3 fclk ex. MCK = 384Fs(1/2) or MCK = 256Fs(1/3) at fclk=768Fs * Two kinds of micro computer interface I2C Bus (standard-mode/100Kbps) 4-Wire Serial Bus (4-Wire: Clock, Enable, Input data, Output data) * Power Supply : DSP Core : 2.5V I/O interface: 2.5V ( +3.3V tolerant ) * Package : QFP 32pin The detail hardware specification of the NJU26103 is described in the " NJU26100 Series Hardware Data Sheet". In respect to software commands, request NJR. Ver.2003-05-16 -1- NJU26103 DSP Block Diagram Fig.1 NJU26103 Block Diagram AD1/SDIN AD2/SSX NJU26103 DSP ARITHMETIC UNIT SERIAL AUDIO INTERFACE BCKO LRO 24-BIT x 24-BIT MULTIPLIER ALU L/R SDO0 SDI0 SDI1 SCL/SCK SDA/SDOUT SERIAL HOST INTERFACE PROGRAM CONTROL RESETX MCK XI XO TIMING GENERATOR ADDRESS GENERATION UNIT BCKI LRI DELAY RAM DATA RAM FIRMWARE ROM GPIO AND CONFIGURATION INTERFACE SEL1 DSP Function Diagram Fig.2 NJU26103 Function Diagram NJU26103 Digital Audio Processor Function Block Diagram SDO0 Lout Delay Lin Rin SDI1 WOW Rout SDI0 Lin Rin -2- Ver.2003-05-16 NJU26103 Pin Configuration VDDR VDDR VDDC VDDC VSSR 24 VSSR 23 VSSC VSSC 22 21 20 19 18 17 SDI0 SDI1 TEST3 LRI BCKI MCK BCKO LRO 25 TEST2 VSSC VDDC RESETX VSSO XO XI VDDO 16 26 15 27 14 28 NJU26103 13 29 30 31 32 1 12 11 10 9 2 3 4 5 6 7 8 TEST0 TEST1 SDO0 SEL1 SCL/SCK SDA/SDOUT AD1/SDIN AD2/SSX Pin Description Table1 Pin Description Description OPEN OPEN Audio Data Output L / R Select I2C(L) or Serial bus(H) 5 SCL/SCK I I2C Clock / Serial Clock 6 SDA/SDOUT IO I2C I/O / Serial Output 7 AD1/SDIN I I2C Address / Serial Input 8 AD2/SSX I I2C Address / Serial Enable 9 VDDO P OSC Power Supply +2.5V 10 XI I X'tal Clock Input 11 XO O X'tal Clock Output 12 VSSO G OSC GND 13 RESETX I RESET 14 VDDC P Core Power Supply +2.5V 15 VSSC G Core GND 16 TEST2 IO OPEN I : Input, O : Output, IO : Bi-directional, P : +Power, No. 1 2 3 4 Symbol TEST0 TEST1 SDO0 SEL1 I/O O O O I No. 17 18 19 20 Symbol VDDC VDDC VSSC VSSC I/O P P G G P P G G I I I I I O O O Description Core Power Supply +2.5V Core Power Supply +2.5V Core GND Core GND I/O Power Supply +2.5V I/O Power Supply +2.5V I/O GND I/O GND Audio Data Input 0 L / R Audio Data Input 1 L / R GND LR Clock Input Bit Clock Input Master Clock Output Bit Clock Output LR Clock Output 21 VDDR 22 VDDR 23 VSSR 24 VSSR 25 SDI0 26 SDI1 27 TEST 28 LRI 29 BCKI 30 MCK 31 BCKO 32 LRO G : GND Ver.2003-05-16 -3- NJU26103 Audio Data Interface The NJU26103 audio interface provides Industry standard serial data formats of I2S, MSB-first left-justified or MSB-first right-justified. The NJU26103 audio interface provides two data inputs, SDI0 and SDI1, and one data output, SDO0. The input serial data is selected by the firmaware command. Table 2 Symbol SDI0 SDI1 Serial Audio Input Pin Pin No. 25 26 Description Sound Data Input 0 L / R Sound Data Input 1 L / R Table 3 Symbol SDO0 Serial Audio Output Pin Pin No. 3 Description Sound Data Output 0 I C address 2 AD1 and AD2 pins are used to configure the seven-bit SLAVE address of the serial host interface. These pins offer additional flexibility to SLAVE address. 4 addresses could be chosen by AD1 and AD2-pin. The AD1 and AD2-pin addresses are decided by the connections of AD1 and AD2-pin. The AD1 and AD2 addresses should be the same level as AD1 and AD2-pin connections. . Table 4 I2C Bus SLAVE Address bit7 bit6 bit5 bit4 Bit3 bit2 bit1 bit0 0 0 1 1 1 AD2*1 AD1*1 R/W *1 AD1 or AD2 address is 0 when AD1 or AD2-pin is "L". AD1 or AD2 address is 1 when AD1 or AD2-pin is "H". The detail I2C bus timing of the NJU26103 is described in the " NJU26100 Series Hardware Data Sheet". -4- Ver.2003-05-16 NJU26103 Firmware Command Table The NJU26103 can be controlled by host processor vie I2C bus or 4-Wire serial bus interface. The following table summarizes the available user commands. Table 5 No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NJU26103 Command List Command Fs Input Select Mode Select WOW TruBass Delay Time Program Mode Through Output WOW Output Trim TruBass Stereo Width System State Firmware Version NOP Command Description Select the sampling frequency : 32/ 44.1/ 48KHz Select digital audio input Select mode : Mute, Thru, WOW Select WOW parameters : Bit rate, Focus, Input mode Select TruBass Speaker size Set Delay time Select mode : Stereo, TruBass, Focus, Delay Trim Through output level Trim WOW output level TruBass Control Stereo Width Control Set System parameters : Digital Audio Format Check Firmware Version Check DSP condition Ver.2003-05-16 -5- NJU26103 License Information 1. The SRS technology right incorporated in the NJU26103 are owned by SRS Labs, a U.S. Corporation and licensed to New Japan Radio Co., Ltd. SRS is protected under U.S. and foreign patents issued and / or pending. SRS, WOW are trademarks of SRS Labs, Inc. in the United States and selected foreign countries. Neither the and the purchase of the NJU26103, nor the corresponding sale of audio enhancement equipment conveys the right to sell commercialized recordings made with any SRS technology. SRS Labs requires that all users of the NJU26103 must enter into a license agreement directly with SRS Labs if the royalty is not Included in the purchase price. SRS Labs also requires any users to comply with all rules and regulations as outlined in the SRS Trademark Usage Manual. For further information, please contact: SRS Labs, Inc. 2909 Daimler Street. Santa Ana, CA 92705 USA Tel: 949-442-1070 Fax: 949-852-1099 http://www.srslabs.com 2 Purchase of I2C components of New Japan Radio Co. ,Ltd or one of sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard specification as defined by Philips. Version V3.0 [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -6- Ver.2003-05-16 |
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